What NISQ actually means, and why every quantum computer fits into that category?

Started by Tracey99, Today at 03:38 AM

Previous topic - Next topic

0 Members and 1 Guest are viewing this topic.

Topic: What NISQ actually means, and why every quantum computer fits into that category?   Views(Read 65 times)
Active members in this topic:
Tracey99(1)

Tracey99

The Quantum Insider published a solid explainer this week on NISQ, or Noisy Intermediate Scale Quantum, the term physicist John Preskill coined back in 2018 to describe the quantum computers actually being built rather than the idealized, fully fault tolerant machines that dominated earlier theoretical discussions. The piece makes a point worth sitting with, every commercially available quantum computer today, IBM's superconducting systems, Google's processors, IonQ's trapped ion hardware, all of it falls into this same NISQ category regardless of how a given press release chooses to frame it.

Each letter in the acronym does real work. Noisy refers to the fact that qubits are extremely sensitive to their environment, with stray electromagnetic fields, temperature fluctuations, and imperfect control signals all introducing errors that accumulate as a computation runs longer. Intermediate scale describes systems in the tens to low thousands of qubits, large enough to be genuinely hard to simulate on a classical computer but far smaller than the millions of physical qubits full fault tolerance is expected to eventually require. Quantum just confirms these machines actually exploit superposition, entanglement, and interference rather than being classical computers dressed up with quantum branding.

The practical limitations follow directly from that noise and scale. Circuit depth is limited because errors pile up with every additional gate applied, gate error rates on current systems typically run somewhere between 0.1 and 1 percent per operation, and full error correction remains out of reach since it requires far more high quality qubits than any current system has. Techniques like zero noise extrapolation and probabilistic error cancellation can meaningfully stretch how much useful computation NISQ hardware can squeeze out before noise dominates, extending effective circuit depth from hundreds of operations into the thousands or occasionally tens of thousands.

The article also makes clear the NISQ era, while still ongoing, is starting to show real cracks at the hardware level. Google's Willow chip demonstrated below threshold error correction back in December 2024, meaning adding more physical qubits to an error correction code actually reduced the logical error rate for the first time on real hardware. Quantinuum followed with a fully fault tolerant gate set in mid 2025 and 94 error protected logical qubits by March 2026. Industry roadmaps are broadly converging on the late 2020s for genuine fault tolerant performance, though the piece is careful to frame this as a gradual transition rather than a single clean cutover point


Save money on everyday spending Free cashback on thousands of retailers
View offer