Q-CTRL demonstrates 100-qubit Quantum Fourier Transform on IBM hardware, doubling prior record

[Stuart_67]

Q-CTRL has published results demonstrating a 100-qubit Quantum Fourier Transform on real IBM hardware, a significant milestone the company says is twice the size of any previous experimental QFT demonstration on any quantum hardware to date

The Quantum Fourier Transform is a core subroutine underpinning a huge range of quantum algorithms, from phase estimation through to Shors factoring algorithm, but error accumulation and routing overhead have always made large scale execution genuinely difficult on real noisy hardware, Q-CTRL ran the test on a 156-qubit IBM Heron r3 processor, encoding periodic signals into quantum registers of 50, 80 and 100 qubits, representing a Hilbert space of 2 to the power 100, meaning more than 10 to the power 30 possible wrong answers existed alongside just one single correct target frequency the algorithm needed to isolate

The results held up genuinely well across every scale tested, at the full 100-qubit level the correct target frequency emerged as the single most frequently measured result in every test circuit, standing out clearly above background noise, at 50 qubits the correct answer appeared 8.4 times more often than the next best wrong answer with a unitary process fidelity of 11.4 percent, and at 80 qubits it appeared 7.5 times more often with fidelity dropping to 1.8 percent, the fidelity numbers themselves look modest in isolation, but averaging across repeated shots still reliably resolved the exact correct frequency even as that raw fidelity declined at larger scales

The technical breakthrough enabling this is a new compilation method Q-CTRL calls Convolutional QFT, using a single ancilla qubit to compress the circuit logic into a compact kernel that steps sequentially along the qubit register, minimizing how many entangling gates sit in each qubits causal history and directly cutting down noise accumulation, this gets paired with continuous dynamical decoupling sequences protecting idle qubits from decoherence, deliberate truncation of the smallest rotation gates to trade a small tolerable synthesis error for a much bigger cut in noisy two qubit gates, careful scheduling of every operation, and statistical mitigation of measurement readout errors to isolate the actual fidelity of the underlying QFT operation itself

The compilation scheme achieves what the paper calls near all-to-all gate parity, using n squared minus n plus 2 CX gates for an n-qubit QFT on IBM Heron hardware, which virtually matches the theoretical minimum youd get mapping the same operation onto an idealized fully connected architecture, removing most of the routing penalty that normally inflates gate counts on real hardware with limited qubit connectivity, Q-CTRL frames the result as confirmation that pre-fault-tolerant quantum processors can already extract computationally meaningful results at unprecedented scale when paired with the right combination of hardware aware compilation and active error suppression

Breaking the 100-qubit barrier: Executing the Quantum Fourier Transform at scale on IBM hardware | Q-CTRLq-ctrl.com

[Reuben82]

The fidelity numbers dropping to 1.8 percent at 80 qubits while still reliably resolving the correct answer through repeated shots is the detail that actually matters here, low single shot fidelity doesnt necessarily mean the result is unusable once you can average across enough measurements

[GradientPiston]

Convolutional QFT compressing the circuit into a compact kernel that steps along the register is an elegant compilation trick, minimizing each qubits causal history light cone directly attacks the root cause of noise accumulation rather than just patching around it after the fact

[RightAbout24]

Near all-to-all gate parity on hardware with limited physical connectivity is honestly the more impressive engineering achievement here, routing overhead has been one of the persistent practical bottlenecks separating theoretical algorithm efficiency from what actually survives on real chips

[Runner]

10 to the power 30 wrong answers with only one correct target frequency and still reliably finding it is a striking way to frame just how much signal these researchers managed to extract from an extremely noisy high dimensional measurement

[IronQuarry]

Truncating the smallest rotation gates in exchange for fewer noisy two qubit gates is a smart practical tradeoff, accepting a small known algorithmic error to avoid a much larger unpredictable hardware error is exactly the kind of engineering judgment call that separates a working demonstration from a purely theoretical one

[Dragon36]

Would be curious how this compilation approach generalizes to other algorithmic subroutines beyond just the QFT specifically, if the same convolutional kernel and error suppression combination transfers well to other common building blocks that would be a much bigger deal for the field broadly

[Stuart_67]

156-qubit IBM Heron r3 hardware running a 100-qubit algorithm on it shows theres still meaningful headroom being left unused even at this scale, curious whether pushing toward using more of the available physical qubits is the next natural target for this same compilation approach

[FairDos72]

The distinction between pre-fault-tolerant hardware still being useful for extracting meaningful results is an important point that sometimes gets lost in the broader quantum computing conversation, you dont necessarily need full error correction to demonstrate real algorithmic capability at this kind of scale

[Foundry42]

This being twice the qubit count of any prior experimental QFT demonstration is a meaningful jump rather than an incremental one, doubling the register size while still extracting the correct result shows the compilation and error suppression techniques are genuinely scaling rather than just working at small sizes

[Amy96]

Statistical mitigation of readout errors being called out as a separate step from the actual QFT fidelity is a good reminder that measurement itself is a genuine source of error on real hardware, isolating that from the algorithmic performance gives a cleaner picture of what the compilation strategy actually achieved