IQM's Directional Tile Codes Cut Quantum Error Rates 1,000-Fold Over Surface Code With 8x Fewer Qubits

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Topic: IQM's Directional Tile Codes Cut Quantum Error Rates 1,000-Fold Over Surface Code With 8x Fewer Qubits   Views(Read 27 times)

Rory99

IQM Quantum Computers announced on June 23 that its directional tile codes achieve up to 1,000-fold reduction in logical error rates compared to the widely used surface code while requiring up to eight times fewer physical qubits per logical qubit. The surface code is the current industry standard for quantum error correction and has been the basis of Google's and IBM's most significant error correction demonstrations. Reducing logical error rates by three orders of magnitude while simultaneously reducing hardware overhead by a factor of eight is a combination that, if it holds at larger scale, would dramatically change the hardware requirements for fault-tolerant quantum computing.

The codes are co-designed with IQM's Crystal processor architecture, which features 12-way qubit connectivity rather than the conventional 4-way grid. The higher connectivity allows the directional tile codes to function using only nearest-neighbour iSWAP gates already native to the Crystal hardware, meaning no new gate types or exotic operations are required. The research was produced in collaboration with teams at Freie Universität Berlin, the University of Edinburgh and Johannes Gutenberg-Universität Mainz, and is available on arXiv.

IQM is preparing to deploy 150-qubit quantum systems to customers later in 2026 and is simultaneously pursuing a Nasdaq listing through a merger with Real Asset Acquisition Corp. The barbell codes announced in early June had already shown three orders of magnitude improvement in a separate configuration. This second result, using directional tile codes, confirms IQM's co-design strategy of building error correction codes specifically around their hardware architecture rather than adapting generic codes to a generic processor. The approach differs from IBM and Google's strategy of demonstrating generic surface code performance improvements on larger qubit counts.