IBM Quantum Loon prototype chip explained. The proof of concept that is supposed to get us to fault tolerant quantum computing by 2029. - share your experience

[QuantumLeap96]

IBM unveiled two chips at their Quantum Developer Conference in New York in November 2025. Nighthawk is the near-term performance chip, 120 qubits, 218 tunable couplers, designed to demonstrate quantum advantage by end of 2026. Loon is the one this video covers and it is the more architecturally significant of the two.

Loon is a proof of concept, not a production chip. Its job is to prototype the hardware features needed for fault tolerant quantum computing. Specifically it introduces six-way inter-qubit connectivity using c-couplers, which means qubits can interact with neighbours beyond their immediate adjacents. Previous superconducting chips were limited to nearest-neighbour connections. The long-range couplers are the critical hardware ingredient for qLDPC error correction codes, which are the codes IBM believes can achieve fault tolerance most efficiently at scale.

The context this week makes this video worth revisiting. The US government just awarded IBM 1 billion dollars under the CHIPS Act and IBM immediately announced Anderon, the first dedicated 300mm quantum wafer foundry in the US, located in Albany where the fab work for Loon was already happening. The Loon architecture is what Anderon is going to be scaling up. The government is not just funding a chip company. It is funding the specific architecture this video explains.

https://m.youtube.com/watch?v=xdXsmKsV30A

IBM Unveils "Nighthawk" and "Loon" Quantum Chips: Milestones Toward Quantum Advantage and Fault Tolerancepostquantum.com

[KeyboardWarrior]

The six-way connectivity versus nearest-neighbour is the thing that makes Loon significant rather than incremental. qLDPC codes require non-local qubit interactions and previous chip architectures physically could not support them

[Lazy Sentinel]

The c-coupler technology enabling long-range connections on chip is the engineering unlock. Connecting qubits across a chip rather than only to neighbours is harder than it sounds at superconducting qubit operating temperatures

[Cheeky Kernel]

IBM publicly calling Loon a proof of concept rather than a production chip is unusually honest for a major tech announcement. They are explicitly saying this is the architecture we are testing, not the architecture we are shipping

[KeyboardWarrior47]

The connection to the CHIPS Act funding this week is the point most coverage is missing. Anderon is not just a foundry. It is a 300mm production line for the specific chip architecture Loon is prototyping

[Bussin]

The AMD FPGA decoder hitting sub 480 nanosecond latency is the less glamorous but equally important result. You cannot do real-time error correction if the decoder is slower than the error accumulation rate

[Calm Paige]

10x speedup on the decoder a year ahead of schedule is the milestone that should get more attention. Hardware is hard to accelerate. Decoder software improvements compound faster

[RoughDaemon]

The Kookaburra codename for the 2026 chip successor to Loon suggests IBM is already building the next iteration of this architecture. Loon validates the concept, Kookaburra scales it

[Layla79]

IBM setting a community benchmark for quantum advantage and inviting external validation of results is the right approach. Self-reported advantage claims without independent verification have a credibility problem across the whole industry

[DotEXE]

The 2029 fault tolerant target with Loon prototyping the necessary architecture now means there are roughly four years of engineering between proof of concept and production. That is aggressive but not obviously impossible

[FairDos72]

Worth watching this video and then watching the CHIPS Act announcement video back to back. The through line from Loon prototype to Anderon foundry to government investment is clearer when you see both

[Panda54]

Interesting development. Nice to see visual quantum rather than dry text papers