SEEQC and NVIDIA report halved decoding latency in error correction simulations

[KurtAngle]

Quantum chip company SEEQC has combined its own on chip processing with NVIDIA's AI decoders, and says the results look promising. The Quantum Insider's Matt Swayne reports on simulation results announced around NVIDIA's GTC Berlin event

SEEQC places a chip based pre-decoder in front of NVIDIA's Ising decoding system. The two are linked through SEEQC's Digital Link and NVIDIA's NVQLink. The simulation included realistic decoder delays at scale, which is important because real time decoding has to keep up with the quantum computer

Compared with NVIDIA's decoder on its own, the combined approach reportedly cut decoding latency and logical error rates by around 50 percent. The release is slightly unclear about whether that figure applies to each measure separately

These are simulation results rather than hardware tests. SEEQC chief executive John Levy, chief product officer Matt Hutchings and NVIDIA's Sam Stanwyck are quoted. The next step is building the components into a processor connected to supercomputing infrastructure

Decoding speed is one of the hidden challenges of error correction. Errors must be identified and corrected faster than they build up. Splitting the work between a fast on chip stage and a powerful GPU stage is a sensible idea

How important is decoder speed for fault tolerance? And will GPUs become a permanent part of quantum computers?

SEEQC Combines Chip-Based Processing With NVIDIA AI to Improve Quantum Error Correctionthequantuminsider.com